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precision triaxial inclinometer and accelerometer with spi adis16210 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2011 analog devices, inc. all rights reserved. features triaxial, digital inclinometer system 180 measurement range, roll and pitch axes 90 gravity axis 0.1 relative accuracy triaxial, digital accelerometer, high accuracy 1.7 g measurement range 0.05 axis-to-axis alignment digital internal temperature measurements digital internal power supply measurements programmable user calibration options single command, frame alignment manual accelerometer bias correction programmable operation and control sample rate/filtering alarm conditions and indicator output input/output: data ready, alarm, general-purpose power management functions spi-compatible serial interface serial number and device id single-supply operation: 3.0 v to 3.6 v calibrated temperature range: ?40c to +85c 15 mm 24 mm 15 mm package with flexible connector applications platform control, stabilization, and alignment tilt sensing, inclinometers, and leveling motion/position measurement monitor/alarm devices (security, medical, safety) navigation general description the adis16210 i sensor? is a digital inclinometer system that provides precise measurements for both pitch and roll angles over a full orientation range of 180. it combines a mems tri- axial acceleration sensor with signal processing, addressable user registers for data collection/programming, and a spi-compatible serial interface. in addition, the production process includes unit specific calibration for optimal accuracy performance. it also offers digital temperature sensor and power supply measurements together with configuration controls for in-system calibration, sample rate, filtering, alarms, i/o configuration, and power management. the mems sensor elements are bound to an aluminum core for tight platform coupling and excellent mechanical stability. an internal clock drives the data sampling system, which eliminates the need for an external clock source. the spi and data buffer structure provide convenient access to accurate sensor data and configuration controls. the adis16210 is available in a 15 mm 24 mm 15 mm module that provides mounting tabs with m2-sized mounting holes and a flexible, edge terminated connector interface. it has an extended operating temperature range of ?40c to +125c. functional block diagram adis16210 incline calibration alarms i/o self test control registers spi port output registers correction and alignment digital filter triaxial mems sensor temperature sensor supply power management cs sclk din dout gnd vdd dio1 dio2 rst controller 09593-001 figure 1.
adis16210 rev. a | page 2 of 20 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? timing specifications .................................................................. 4 ? absolute maximum ratings............................................................ 5 ? esd caution.................................................................................. 5 ? pin configuration and function descriptions............................. 6 ? basic operation................................................................................. 7 ? reading sensor data.................................................................... 7 ? device configuration .................................................................. 7 ? user register map ............................................................................ 8 ? sensor data........................................................................................ 9 ? output data registers.................................................................. 9 ? signal processing, bias correction, and alignment .................. 12 ? system tools.................................................................................... 14 ? global commands ..................................................................... 14 ? input/output functions ............................................................ 14 ? device identification.................................................................. 15 ? status/error flags ....................................................................... 15 ? flash memory management ..................................................... 15 ? alarms.............................................................................................. 16 ? system alarm.............................................................................. 16 ? static alarms ............................................................................... 16 ? dynamic alarms ........................................................................ 16 ? alarm reporting ........................................................................ 16 ? applications information .............................................................. 17 ? interface board ........................................................................... 17 ? mating connector ...................................................................... 17 ? outline dimensions ....................................................................... 18 ? ordering guide .......................................................................... 18 ? revision history 6/11rev. 0 to rev. a changes to table 1............................................................................ 3 changes to table 23........................................................................ 12 changes to figure 24 and figure 25............................................. 17 4/11revision 0: initial version
adis16210 rev. a | page 3 of 20 specifications t a = ?40c to +85c, vdd = 3.0 v to 3.6 v, unless otherwise noted. table 1. parameter test conditions/comments min typ max unit inclinometers measurement range ?180 +180 degrees relative accuracy 30, avg_cnt 0x0009, 3 0.1 degrees 60, avg_cnt 0x0009, 1 0.1 degrees 60, avg_cnt 0x0009, 3 0.15 degrees 180, avg_cnt 0x0009, 1 0.14 degrees 180, avg_cnt 0x0009, 3 0.21 degrees noise density t a = 25c, avg_cnt = 0x0000 0.011 /hz accelerometers measurement range 1.7 g offset error 1 1 m g sensitivity error 1 0.0244 % nonlinearity 1 g , 1 1 2 m g misalignment axis to axis, deviation from 90, 1 0.05 degrees noise density t a = 25c, avg_cnt = 0x0000 190 g/ hz bandwidth ?3 db decrease in dc sensitivity, t a = 25c 50 hz sensor resonant frequency t a = 25c 5.5 khz logic inputs 1 input high voltage, v inh 2.0 v input low voltage, v inl 0.8 v logic 1 input current, i inh v ih = 3.3 v 0.2 1 a logic 0 input current, i inl v il = 0 v all except rst ?40 ?60 a rst ?1 ma input capacitance, c in 10 pf digital outputs 1 output high voltage, v oh i source = 1.6 ma 2.4 v output low voltage, v ol i sink = 1.6 ma 0.4 v flash memory endurance 2 10,000 cycles data retention 3 t j = 85c 20 years start-up time 4 initial startup 156 ms reset recovery 5 rst pulse low or register glob_cmd[7] = 1 33.8 ms sleep mode recovery after cs assertion from high to low 22.3 ms conversion rate register avg_cnt = 0x0000 512 sps clock accuracy 3 % power supply operating voltage range, vdd 3.0 3.3 3.6 v power supply current normal mode, t a = 25c 18 ma sleep mode, t a = 25c 230 a 1 the digital i/o signals are 5 v tolerant. 2 endurance is qualified as per jedec standard 22, method a117, and measured at ?40c, +25c, +85c, and +125c. 3 retention lifetime equivalent at junction temperature (t j ) = 85c as per jedec standard 22, me thod a117. retention li fetime decreases with ju nction temperature. see figure 22. 4 the start-up times presented do not include the data capture time, which is dependent on the avg_cnt register settings. 5 the rst pin must be held low for at least 15 ns.
adis16210 rev. a | page 4 of 20 timing specifications t a = 25c, vdd = 3.3 v, unless otherwise noted. table 2. parameter description min 1 typ max unit f sclk sclk frequency 10 830 khz t stall stall period between data, between 16 th and 17 th sclk 40 s t cs chip select to sclk edge 48.8 ns t dav dout valid after sclk edge 100 ns t dsu din setup time before sclk rising edge 24.4 ns t dhd din hold time after sclk rising edge 48.8 ns t sr sclk rise time 12.5 ns t sf sclk fall time 12.5 ns t df , t dr dout rise/fall times, not shown in timing diagrams section. 5 12.5 ns t sfs cs high after sclk edge 5 ns 1 guaranteed by design, not tested. timing diagrams cs sclk dout din 123456 1 51 6 r/w a5 a6 a4 a3 a2 d2 msb db14 d1 lsb db13 db12 db10 db11 db2 lsb db1 t cs t sfs t dav t sr t sf t dhd t dsu 09593-002 figure 2. spi timing and sequence cs sclk t stall 09593-003 figure 3. din bit sequence
adis16210 rev. a | page 5 of 20 absolute maximum ratings table 3. parameter rating acceleration any axis, unpowered 3500 g any axis, powered 3500 g vdd to gnd ?0.3 v to +6.0 v digital input voltage to gnd ?0.3 v to +5.3 v digital output voltage to gnd ?0.3 v to vdd + 0.3 v analog inputs to gnd ?0.3 v to +3.6 v operating temperature range ?40c to +125c storage temperature range ?65c to +150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 4. package characteristics package type ja jc device weight 15-lead module 31c/w 11c/w 7.2 grams esd caution
adis16210 rev. a | page 6 of 20 pin configuration and fu nction descriptions 09593-004 top view bottom view pin 15 pin 15 pin 1 pin 1 notes 1. leads are exposed copper pads located on the bottom side of the flexible interface cable. 2. package is not suitable for solder reflow assembly processes. 3. example mating connector: avx corporation flat flexible connector (ffc) p/n: 04-6288-015-000-846. figure 4. pin configuration table 5. pin function descriptions pin no. mnemonic type 1 description 1, 2 vdd s power supply, 3.3 v. 3, 4, 5, 8 gnd s ground. 6, 9 dnc i do not connect. do not connect to these pins. 7 dio2 i/o digital input/output line 2. 10 rst i reset, active low. 11 din i spi, data input. 12 dout o spi, data output. dout is an output when cs is low. when cs is high, dout is in a three-state, high impedance mode. 13 sclk i spi, serial clock. 14 cs i spi, chip select. 15 dio1 i/o digital input/output line 1. 1 s is supply, o is output, i is input, and i/o is input/output.
adis16210 rev. a | page 7 of 20 basic operation the adis16210 is an autonomous system that requires no user initialization. upon receiving a valid power supply, it initializes itself and starts sampling, processing, and loading data into the output registers. when using the factory default configuration, dio1 provides a data ready signal. the spi interface enables simple integration with many embedded processor platforms, as shown in figure 5 (electrical connection) and table 6 (processor pin descriptions). system processor spi master adis16210 sclk cs din dout sclk ss mosi miso 3.3v irq dio1 vdd i/o lines are compatible with 3.3v or 5v logic levels 14 13 11 12 15 1 2 3 4 5 8 09593-006 figure 5. electrical connection diagram table 6. generic master processor pin names and functions pin name function ss slave select irq interrupt request, optional mosi master output, slave input miso master input, slave output sclk serial clock the adis16210 spi interface supports full duplex serial commu- nication (simultaneous transmit and receive) and uses the bit sequence shown in figure 9 . table 7 provides a list of the most common settings that initialize the serial port of a processor for the adis16210 spi interface. table 7. generic master processor spi settings processor setting description master adis16210 operates as a slave sclk rate 830 khz maximum serial clock rate spi mode 3 cpol = 1 (polarity), cpha = 1 (phase) msb-first mode bit sequence 16-bit mode shift register/data length reading sensor data a single register read requires two 16-bit spi cycles. the first cycle requests the contents of a register using the bit assignments in figure 9 . the register contents then follow on dout, during the second sequence. figure 6 includes three single register reads in succession. in this example, the process starts with din = 0x0400 to request the contents of the xaccl_out register, followed by 0x0600 to request the contents of the yaccl_out register, and then 0x0800 to request the contents of the zaccl_out register. full duplex operation enables processors to use the same 16-bit spi cycle to read data from dout while requesting the next set of data on din. din dout 0x0400 0x0600 0x0800 xaccl_out yaccl_out zaccl _out 0 9593-007 figure 6. spi read example remove figure 7 provides an example of four spi signals when reading prod_id in a repeating pattern. dout = 0011 1111 0101 1100 = 0x3f52 = 16210 din = 0101 0110 0000 0000 = 0x5600 cs sclk din dout 09593-008 figure 7. spi read example, second 16-bit sequence device configuration the user register map ( table 8 ) provides a variety of control registers, which enable optimization for specific applications. the spi provides access to these registers, one byte at a time, using the bit assignments shown in figure 9 . each register has 16 bits, where bits[7:0] represent the lower address and bits[15:8] represent the upper address. figure 8 displays the spi signal pattern for writing 0x07 to address 0x38, which sets the number of averages to 128 and the sample rate to 4 sps. din = 1011 1000 0000 0111 = 0xb807, set avg_cnt[7:0] = 0x07 cs sclk din 09593-009 figure 8. example spi write pattern 09593-113 r/w r/w a6 a5 a4 a3 a2 a1 a0 dc7 dc6 dc5 dc4 dc3 dc2 dc1 dc0 d0d1 d2 d3d4d5 d6 d7d8d9 d10 d11 d12d13d14 d15 cs sclk din dout a6 a5 d13d14 d15 notes 1. dout bits are produced only when the previous 16-bit din sequence starts with r/w = 0. 2 . when cs is high, dout is in a three-state, high impedance mode, which allows multifunctional use of the line for other devices. figure 9. spi communication bit sequence
adis16210 rev. a | page 8 of 20 user register map figure 10 provides a diagram of the dual memory structure used to manage operation and store user settings. writing con- figuration data to a control register updates its sram contents, which are volatile. most of the user registers have mirror locations in flash memory (see table 8 , for yes in the flash backup column). use the manual flash backup command in glob_cmd[6] (din = 0xbe40) to save these settings into the nonvolatile flash memory. the flash backup process requires a valid power supply level and zero spi communication for the entire 28 ms process time. nonvolatile flash memory (no spi access) manual flash backup start-up reset volatile sram spi access 09593-116 figure 10. sram and flash memory diagram table 8. user register memory map 1 name r/w flash backup address size (bytes) function reference flash_cnt r yes 0x00 2 diagnostics, flash write counter (16-bit binary) table 37 supply_out r no 0x02 2 output, power supply table 20 xaccl_out r no 0x04 2 output, x-axis acceleration table 9 yaccl_out r no 0x06 2 output, y-axis acceleration table 10 zaccl_out r no 0x08 2 output, z-axis acceleration table 11 temp_out r no 0x0a 2 output, internal temperature table 18 xincl_out r no 0x0c 2 output, 180 x-axis inclination table 13 yincl_out r no 0x0e 2 output, 180 y-axis inclination table 14 zincl_out r no 0x10 2 output, 180 z-axis inclination table 15 xaccl_null r/w yes 0x12 2 calibration, x-axis acceleration offset null table 24 yaccl_null r/w yes 0x14 2 calibration, y-axis acceleration offset null table 25 zaccl_null r/w yes 0x16 2 calibration, z-axis acceleration offset null table 26 0x18 to 0x1f 8 reserved, do not write to these locations alm_mag_x r/w yes 0x20 2 alarm, x-axis amplitude threshold table 39 alm_mag_y r/w yes 0x22 2 alarm, y-axis amplitude threshold table 40 alm_mag_z r/w yes 0x24 2 alarm, z-axis amplitude threshold table 41 alm_mag_s r/w yes 0x26 2 alarm, system alarm threshold table 42 alm_smpl_x r/w yes 0x28 2 alar m, x-axis sample period table 43 alm_smpl_y r/w yes 0x2a 2 alarm, y-axis sample period table 44 alm_smpl_z r/w yes 0x2c 2 alar m, z-axis sample period table 45 alm_ctrl r/w yes 0x2e 2 operation, alarm control table 38 0x30 2 reserved gpio_ctrl r/w yes 0x32 2 operation, general i/o configuration and data table 31 msc_ctrl r/w yes 0x34 2 operation, orientation mode table 27 dio_ctrl r/w yes 0x36 2 operation, digital i/o configuration and data table 30 avg_cnt r/w yes 0x38 2 operation, decimation filter configuration table 22 slp_cnt r/w yes 0x3a 2 operation, sleep count table 29 diag_stat r no 0x3c 2 diagnost ics, system status register table 36 glob_cmd w no 0x3e 2 operatio n, system command register table 28 0x40 to 0x51 16 reserved lot_id1 r n/a 0x52 2 lot identification, code 1 table 32 lot_id2 r n/a 0x54 2 lot identification, code 2 table 33 prod_id r n/a 0x56 2 production identification number table 34 serial_num r n/a 0x58 2 serial number table 35 1 n/a means not applicable.
adis16210 rev. a | page 9 of 20 sensor data output data registers the adis16210 provides a set of output registers for three orthogonal axes of acceleration: incline angles, internal temperature, and power supply. accelerometers the accelerometers respond to both static (gravity) and dynamic acceleration using the polarity shown in figure 11 . xaccl_out ( table 9 ), yaccl_out ( table 10 ), and zaccl_out ( table 11 ) provide user access to digital calibrated accelerometer data for each axis. for example, use din = 0x0400 to request the x-axis data (xaccl_out). after reading the contents of one of these registers, convert the 16-bit, twos complement number into a decimal equivalent, and then divide that number by 16,384 to convert the measurement into units of gravity ( g ). table 12 provides several examples of this data format. table 9. xaccl_out (base address = 0x04), read only bits description [15:0] x-axis accelerometer output data, twos complement, 1 lsb = 1 g 16,384 = ~61 g /lsb, 0 g = 0x0000 table 10. yaccl_out (base address = 0x06), read only bits description [15:0] y-axis accelerometer output data, twos complement, 1 lsb = 1 g 16,384 = ~61 g /lsb, 0 g = 0x0000 table 11. zaccl_out (base address = 0x08), read only bits description [15:0] z-axis accelerometer output data, twos complement, 1 lsb = 1 g 16,384 = ~61 g /lsb, 0 g = 0x0000 table 12. accelerometer data format examples orientation ( g ) decimal hex binary +1.7 +27,853 0x6ccd 0110 1100 1100 1101 +1 +16,384 0x4000 0100 0000 0000 0000 +2/16,384 +2 0x0002 0000 0000 0000 0010 +1/16,384 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ?1/16,384 ?1 0xffff 1111 1111 1111 1111 ?2/16,384 ?2 0xfffe 1111 1111 1111 1110 ?1 ?16,384 0xc000 1100 0000 0000 0000 ?1.7 ?27,853 0x9333 1001 0011 0011 0011 inclinometers registers xincl_out ( table 13 ), yincl_out ( table 14 ), and zincl_out ( table 15 ) provide access to incline angle data for each axis. for example, set din = 0x0e00 to request y-axis data (yincl_out). use the following process to translate the contents of these registers into degrees (): 1. convert the 16-bit, twos complement number into a decimal equivalent. 2. multiply the decimal equivalent by 180. 3. divide the result of step 2 by 32,768. table 16 provides several examples of this data format. table 13. xincl_out (base address = 0x0c), read only bits description [15:0] x-axis inclinometer output data, binary, 0 = 0x0000, 1 lsb = 180/32,768 = ~0.0055/lsb table 14. yincl_out (base address = 0x0e), read only bits description [15:0] y-axis inclinometer output data, binary, 0 = 0x0000, 1 lsb = 180/32,768 = ~0.055/lsb table 15. zincl_out (base a ddress = 0x10), read only bits description [15:0] z-axis inclinometer output data, binary, 0 = 0x0000, 1 lsb = 180/32,768 = ~0.0055/lsb table 16. incline angle data format examples orientation decimal hex binary +179.9945 +32,767 0x7fff 0111 1111 1111 1111 +0.011 +2 0x0002 0000 0000 0000 0010 +0.0055 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ?0.0055 ?1 0xffff 1111 1111 1111 1111 ?0.011 ?2 0xfffe 1111 1111 1111 1110 ?180 ?32,768 0x8000 1000 0000 0000 0000 figure 11 through figure 16 provide orientation examples and the associated output values for each accelerometer and incli- nometer register. these examples assume the factory default configuration for the gravity vector (z-axis, pointed up). see the msc_ctrl ( table 27 ) for additional options for gravity vector definitions.
adis16210 rev. a | page 10 of 20 09593-012 a x a z a y figure 11. inclinometer output example, 0 tilt 09593-013 a z a y a x figure 12. inclinometer output example, ?30 y-axis tilt 09593-016 a z a y a x figure 13. inclinometer output exampls, ?30 x-axis tilt 09593-014 a x a y a z figure 14. inclinometer output example, +30 y-axis tilt 09593-017 a x a y a z figure 15. inclinometer output example, +30 x-axis tilt 09593-015 a x a z a y figure 16. inclinometer output example, 180 tilt table 17. orientation/output examples for z-axis gravity orientation 1 register figure 11 figure 12 figure 13 figure 14 figure 15 figure 16 xaccl_out 0 0 ?8192 0 +8192 0 yaccl_out 0 ?8192 0 +8192 0 0 zaccl_out +16,384 +14,189 +14,189 +14,189 +14,189 ?16,384 xincl_out 0 0 ?5462 0 +5462 ?32,768 yincl_out 0 ?5462 0 +5462 0 ?32,768 zincl_out +16,384 +10,922 +10,922 +10,922 +10,922 ?16,384 1 register setting for z-axis gravity orientation is msc_ctrl[7:0] = xxxx xx10.
adis16210 rev. a | page 11 of 20 internal temperature the temp_out register ( table 18 ) provides access to an internal temperature measurement. set din = 0x0a00 to request the contents of this register. use the following process to translate the contents of temp_out into celsius (c): 1. convert the 12-bit binary number into a decimal equivalent. 2. subtract 1278 from the decimal equivalent. 3. multiply the result of step 2 by ?0.47. 4. add 25 to the result of step 3. table 19 provides several examples of this data format. note that this internal temperature measurement provides an indicator of condition changes, not an absolute measurement of conditions outside of the package. table 18. temp_out (base address = 0x0a), read only bits description [15:0] internal temperature data, binary format, sensitivity = ?0.47/lsb, +25c = 1278 lsb = 0x04fe table 19. internal temperature data format examples temperature (c) lsb hex binary +125 1065 0x0429 0000 0100 0010 1001 25 + 0.47 1277 0x04fd 0000 0100 1111 1101 +25 1278 0x04fe 0000 0100 1111 1110 25 ? 0.047 1279 0x04ff 0000 0100 1111 1111 0 1331 0x0533 0000 0101 0011 0011 ?40 1416 0x0588 0000 0101 1000 1000 power supply the supply_out register ( table 20 ) provides a digital measure- ment for the supply voltage on the vdd pins (see tabl e 5 ). set din = 0x0200 to request the contents of this register. use the following process to translate the contents of supply_out into volts (v): 1. convert the 16-bit binary number into a decimal equivalent. 2. multiply the decimal equivalent by 5. 3. divide the result of step 2 by 32,768. table 21 provides several examples of this data format. table 20. supply_out (base address = 0x02), read only bits description [15:0] power supply measurement data, binary format, 1 lsb = 5 32,768 = ~152.6 v, 0 v = 0x0000 table 21. power supply data format examples supply level (v) lsb hex binary 3.6 23,593 0x5c29 0101 1100 0010 1001 3.3 + (5 32,768) 21,628 0x547c 0101 0100 0111 1100 3.3 21,627 0x547b 0101 0100 0111 1011 3.3 ? (5 32,768) 21,626 0x547a 0101 0100 0111 1010 3.0 19,661 0x4ccd 0100 1100 1100 1101
adis16210 rev. a | page 12 of 20 signal processing, bias correction, and alignment 0 9593-020 3-axis mems accel factory calibration and alignment user reference alignment pitch roll angle calculation number of averages avg_cnt xaccl_out yaccl_out zaccl_out xincl_out yincl_out zincl_out user-adjustable bias correction xaccl_null, yaccl_null, zaccl_null gravity axis definition select using msc_ctrl[1:0] user-driven alignment correction set glob_cmd[0] = 1 figure 17. sensor signal processing diagram (each axis) the adis16210 provides user controls for digital filtering, accele- rometer bias correction, gravity vector axis definition, and the measurement mode. digital filtering the digital filter uses an averaging/decimating architecture to produce a low-pass response. the avg_cnt register ( table 22 ) provides access to the average factor, m, which determines the number of averages (n) in the filtering stage. table 23 provides the resulting cut-off frequency (f c ) and output register update rate (f s ) associated with each setting in avg_cnt. table 22. avg_cnt (base address = 0x38), read/write bits description (default = 0x0009) [15:4] not used [3:0] average factor, m, binary format number of averages, n = 2 m table 23. avg_cnt sample rate, bandwidth avg_cnt[7:0] m n f s (output) f c (?3 db) noise (p-p) 0x0000 0 1 512 48.2 0.32 0x0001 1 2 256 44.6 0.30 0x0002 2 4 128 36.1 0.27 0x0003 3 8 64 23.9 0.22 0x0004 4 16 32 13.5 0.17 0x0005 5 32 16 7.0 0.12 0x0006 6 64 8 3.5 0.09 0x0007 7 128 4 1.8 0.06 0x0008 8 256 2 0.89 0.04 0x0009 9 512 1 0.44 0.03 0x000a 10 1024 0.5 0.22 0.02 0x000b 11 2048 0.25 0.11 0.02 accelerometer bias correction the xaccl_null ( table 24 ), yaccl_null ( tabl e 25 ), and zaccl_null ( tabl e 26 ) registers add to the accelerometer out- puts to provide a bias adjustment function. they use the same format as each accelerometer output register. for example, set xaccl_null = 0x00f (din = 0x9300, 0x920f) to increase the x-axis bias by 15 lsb, or 915.5 g (15 16,384). table 24. xaccl_null (base address = 0x12), read/write bits description (default = 0x0000) [15:0] same format as xaccl_out, see table 9 table 25. yaccl_null (base address = 0x14), read/write bits description (default = 0x0000) [15:0] same format as yaccl_out, see table 10 table 26. zaccl_null (base address = 0x16), read/write bits description (default = 0x0000) [15:0] same format as zaccl_out, see table 11 gravity vector axis definition the adis16210 uses the following equations to translate calibrated, triaxial accelerometer data into incline angles: ? ? ? ? ? ? ? ? ? ? + = ? ? ? ? ? ? ? ? ? ? + = ? ? ? ? ? ? ? ? ? ? + = 22 22 22 atan2 atan2 atan rp gp g g p gp r g r gp p aak a aak a aak a 2
adis16210 rev. a | page 13 of 20 the pitch () and roll () axes provide 180 of measurement range, whereas the gravity () axis provides 90 of measurement range. the msc_ctrl register (see table 27 ) provides three control bits that set the orientation of the device, which assigns each accelerometer to an angle axis (pitch, roll, gravity). table 27. msc_ctrl (base address = 0x34), read/write bits value description (default = 0x0002) [15:10] not used [9:8] measurement mode 0 inclinometer 1 accelerometer [7:3] not used [2] gravity vector polarity, k gp 1 negative, pointing down (?) 0 positive, pointing up (+) [1:0] gravity vector orientation 00 x = gravity vector y = pitch axis (, a p ) z = roll axis (, a r ) 01 y = gravity vector x = pitch axis (, a p ) z = roll axis (, a r ) 10 z = gravity vector x = pitch axis (, a p ) y = roll axis (, a r ) 11 reserved for best use of the available range and accuracy, use bits[2:0] in the msc_ctrl register to establish the accelerometer that best aligns with gravity when the device is oriented at its reference point. for example, figure 11 provides a reference point orien- tation, where the z-axis accelerometer aligns with gravity, for which the factory default setting for msc_ctrl (0x0002) is optimal. bits[1:0] provide a control for setting the axis that is most closely aligned with the gravity vector and assigns the pitch and roll axes. bit 2 provides a control for the direction/polarity of this. thus, when using the factory default setting for msc_ctrl, read xincl_out for the pitch angle and yincl_out for the roll angle measurements. figure 18 , figure 19 , and figure 20 provide several examples for these settings, which are different from the factory programmed settings. 09593-021 a z figure 18. z-axis gravity vector, negative polarity set msc_ctrl = 0x0006 (din = 0xb406) 09593-018 a x figure 19. x-axis gravity vector, positive polarity set msc_ctrl = 0x0000 (din = 0xb400) 09593-019 a y figure 20. y-axis gravity vector, negative polarity set msc_ctrl = 0x0005 (din = 0xb405) measurement mode msc_ctrl[8] establishes the primary measurement function. setting msc_ctrl[8] = 1 (din = 0xb501) disables signal pro- cessing on the accelerometer data, which is specific to producing incline angle measurements.
adis16210 rev. a | page 14 of 20 system tools the adis16210 provides control registers for the following system level functions: global commands (including self test), input/output functions, device identification, status/error flags, and flash memory management. global commands the glob_cmd register ( tabl e 28 ) provides an array of single write commands. set the assigned bit to 1 to activate each func- tion. proper execution of each command depends on the power supply being within normal limits and no spi communication, during the process times listed in table 28 . table 28. glob_cmd (base address = 0x3e), write only bits description process time 1 [15:8] not used n/a 2 [7] software reset 33.7 ms [6] user register save to flash memory 28.0 ms [5] flash memory test 31.3 ms [4] clear diag_stat register 93 s [3] restore factory default configuration 68.6 ms [2] self test 53.7 ms [1] power-down n/a 2 [0] not used n/a 2 1 this indicates the typical duration of time between the command write and the device returning to normal operation. 2 n/a means not applicable. software reset set glob_cmd[7] = 1 (din = 0xbe80) to execute an internal reset, which flushes all data and restores the register values to the values that are stored in nonvolatile flash memory. user register save to flash memory set glob_cmd[6] = 1 (din = 0xbe40) to back up all of the current register settings into nonvolatile flash memory. flash memory test set glob_cmd[5] = 1 (din = 0xbe20) to execute the internal flash memory test routine, which computes a check sum verifi- cation of all flash memory locations that are not configurable through user commands. self test set glob_cmd[2] = 1 (din = 0xbe04) to execute an internal test routine that exercises the sensors and signal processing circuit, then writes the pass/fail result to bit 5 of the diag_stat register. power-down set glob_cmd[1] = 1 (din = 0xbe02) to put the device into sleep mode. use the slp_cnt register to establish the duration of the sleep period. for example, set slp_cnt[7:0] = 0x64 (din = 0xba64) to set the sleep period to 50 seconds. set slp_cnt[7:0] = 0x00 (din = 0xba00) to establish the sleep period as indefinite. indefinite sleep mode requires one of the three actions to wake up: negative assertion of the cs line (22.3 ms wake-up time), a negative assertion of the rst line (33.8 ms recovery time), or a power cycle (156 ms start-up time). table 29. slp_cnt (base address = 0x3a), read/write bits description (default = 0x0000) [15:8] not used [7:0] binary, sleep time, 0.5 seconds/lsb 0x00 = indefinite sleep mode input/output functions the dio_ctrl register ( table 30 ) provides configuration control options for the two digital i/o lines. bits[5:4] and bit 1 assign the function and active polarity for dio2. bits[3:2] and bit 0 assigned the function and polarity for dio1. table 30. dio_ctrl (base address = 0x36), read/write bits value description (default = 0x0007) [15:6] not used [5:4] dio2 function selection 00 general-purpose 01 data ready 10 alarm indicator 11 busy signal [3:2] dio1 function selection 00 general-purpose 01 data ready 10 alarm indicator 11 busy signal [1] dio2 polarity 1 active high 0 active low [0] dio1 polarity 1 active high 0 active low data ready indicator the data ready signal pulses to its inactive state when loading fresh data into the output registers, then back to its active state when the register update process completes, as shown in figure 21 , which shows the factory default operation. set dio_ctrl[7:0] = 0x13 (din = 0xb613) to change the data ready assignment to dio2 with a positive polarity. 09593-02 3 active inactive dio1 figure 21. data ready operat ion, dio_ctrl[7:0] = 0x05 alarm indicator set dio_ctrl[7:0] = 0x27 (din = 0xb627) to configure dio2 as an alarm indicator with an active high polarity. the alarm indicator transitions to its active state when the acceleration or system data exceeds the threshold settings in the alm_mag_x registers. set glob_cmd[4] = 1 (din = 0xbf10) to clear the diag_stat error flags and restore the alarm indicator to its inactive state.
adis16210 rev. a | page 15 of 20 general-purpose input/output if dio_ctrl configures either dio1 or dio2 as a general- purpose digital line, use the gpio_ctrl register ( table 31 ) to configure its input/output direction, set the output level when configured as an output, and monitor the status of an input. for example, set dio_ctrl[3:0] = 0x00 (din = 0xb600) to establish dio1 as a general-purpose line, set gpio_ctrl[0] = 1 (din = 0xb201) to establish dio1 as an output, and set gpio_ctrl[8] = 1 (din = 0xb301) to set dio1 high. table 31. gpio_ctrl (base address = 0x32), read/write bits description (default = 0x0000) [15:10] not used [9] dio2 output level, 1 = high, 0 = low [8] dio1 output level, 1 = high, 0 = low [7:2] reserved [1] dio2 direction control, 1 = output, 0 = input [0] dio1 direction control, 1 = output, 0 = input device identification table 32. lot_id1 (base address = 0x52), read only bits description [15:0] lot identification code table 33. lot_id2 (base address = 0x54), read only bits description [15:0] lot identification code table 34. prod_id (base address = 0x56), read only bits description (default = 0x3f52) [15:0] 0x3f52 = 16,210 table 35. serial_num (base address = 0x58), read only bits description [15:0] serial number, lot specific status/error flags the diag_stat register, in table 36 , provides a number of status/error flags that reflect the conditions observed during a capture, during spi communication and diagnostic tests. a 1 indicates an error condition and all of the error flags are sticky, which means that they remain until they are reset by setting glob_cmd[4] = 1 (din = 0xbe10). the flag in bit 3 of the diag_stat register indicates that the total number of sclk clocks is not a multiple of 16. set din = 0x3c00 to read this register. table 36. diag_stat (base address = 0x3c), read only bits description (default = 0x0000) [15:12] not used [11] alarm s flag [10] alarm z flag [9] alarm y flag [8] alarm x flag [7] data ready [6] flash test [5] self test [4] not used [3] spi failure [2] flash update failure [1] vdd > 3.625 [0] vdd < 2.975 flash memory management set glob_cmd[5] = 1 (din = 0xbe20) to run an internal check- sum test on the flash memory, which reports a pass/fail result to diag_stat[6]. the flash_cnt register ( table 37 ) provides a running count of flash memory write cycles. this is a tool for managing the endurance of the flash memory. figure 22 quantifies the relationship between data retention and junction temperature. table 37. flash_cnt (base address = 0x00), read only bits description [15:0] binary counter for writing to flash memory 600 450 300 150 0 30 40 retention (years) junction temperature (c) 55 70 85 100 125 135 150 09593-115 figure 22. flash/ee memory data retention
adis16210 rev. a | page 16 of 20 alarms there are four independent alarms, which provide trigger level and polarity controls. the alm_ctrl register ( table 38 ) provides individual settings for data source selection (bits[7:4]), static and dynamic comparison (bits[14:12]), trigger direction/polarity (bits[11:8]), and alarm enable (bits[3:0]). table 38. alm_ctrl (base a ddress = 0x2e), read/write bits description (default = 0x0000) [15] not used [14] alarm z, dynamic control 1 = dynamic, 0 = static [13] alarm y, dynamic control 1 = dynamic, 0 = static [12] alarm x, dynamic control 1 = dynamic, 0 = static [11] alarm s, comparison polarity 1 = supply_out/temp_out > alm_mag_s 0 = supply_out/temp_out < alm_mag_s [10] alarm z, comparison polarity 1 = zaccl_out/zincl_out > alm_mag_z 0 = zaccl_out/zincl_out < alm_mag_z [9] alarm y, comparison polarity 1 = yaccl_out/yincl_out > alm_mag_y 0 = yaccl_out/yincl_out < alm_mag_y [8] alarm x, comparison polarity 1 = xaccl_out/xincl_out > alm_mag_x 0 = xaccl_out/xincl_out < alm_mag_x [7] alarm s, source selection 1 = supply_out, 0 = temp_out [6] alarm z, source selection 1 = zincl_out, 0 = zaccl_out [5] alarm y, source selection 1 = yincl_out, 0 = yaccl_out [4] alarm x, source selection 1 = xincl_out, 0 = xaccl_out [3] alarm s, enable 1 = enabled, 0 = disabled [2] alarm z, enable 1 = enabled, 0 = disabled [1] alarm y, enable 1 = enabled, 0 = disabled [0] alarm x, enable 1 = enabled, 0 = disabled system alarm the system alarm monitors either power supply or internal tem- perature, according to the user selections in alm_ctrl[11], alm_ctrl[7], alm_ctrl[3], and the alm_mag_s register in table 42 . for example, set alm_ctrl = 0x0008 (din = 0xa900, 0xa808) and alm_mag_s = 0x533 (din = 0xa705, 0xa633) to disable all three inertial alarms and configure the system alarm active when temp_out < 0c. static alarms the static alarm setting enables the adis16210 to compare the data source (alm_ctrl[6:4]) with the corresponding values in the alm_mag_x registers ( table 39 , table 40 , and table 41 ) using the trigger direction/polarity settings in alm_ctrl[10:8]. for example, if alm_ctrl[10] = 0, alm_ctrl[6] = 1, and alm_mag_z = 0x2000, then alarm z becomes active when zincl_out is less than 0x2000, or 45. dynamic alarms the dynamic alarm setting monitors the data selection for a rate-of-change comparison. the rate-of-change comparison is represented by the magnitude in the alm_mag_x registers ( tabl e 39 , table 40 , and table 4 1 ), divided by the time in the alm_smpl_x registers ( table 43 , table 44 , table 45 ). for example, if alm_ctrl[9] = 1, alm_ctrl[5] = 0, alm_mag_y = 0x4000, and alm_smpl_y = 0x0064, then alarm y (diag_stat[9]) becomes active when yaccl_out changes by more than +1 g over 100 samples. the avg_cnt register ( table 22 ) establishes the time for each sample. table 39. alm_mag_x (base address = 0x20), read/write bits description (default = 0x0000) [15:0] same data format as zaccl_out or zincl_out, according to the setting in alm_ctrl[4] table 40. alm_mag_y (base address = 0x22), read/write bits description (default = 0x0000) [15:0] same data format as zaccl_out or zincl_out, according to the setting in alm_ctrl[5] table 41. alm_mag_z (base address = 0x24), read/write bits description (default = 0x0000) [15:0] same data format as zaccl_out or zincl_out, according to the setting in alm_ctrl[6] table 42. alm_mag_s (base address =0x26), read/write bits description (default = 0x0000) [15:0] same data format as supply_out or temp_out, according to the setting in alm_ctrl[7] table 43. alm_smpl_x (base address = 0x28), read/write bits description (default = 0x0001) [15:8] not used [7:0] binary, number of samples table 44. alm_smpl_y (base address = 0x2a), read/write bits description (default = 0x0001) [15:8] not used [7:0] binary, number of samples table 45. alm_smpl_z (base address = 0x2c), read/write bits description (default = 0x0001) [15:8] not used [7:0] binary, number of samples alarm reporting see diag_stat[11:8] ( tabl e 3 6 ) for alarm flags, which equal 1 when an alarm condition is detected. dio_ctrl ( table 30 ) offers settings that configure dio1 or dio2 as an alarm indicator signal.
adis16210 rev. a | page 17 of 20 applications information interface board the adis16210/pcbz provides the adis16210cmlz on a small printed circuit board (pcb) that simplifies the connection to an existing processor system. this pcb provides a silkscreen for proper placement and four mounting holes, which have threads for m2 0.4 mm machine screws. the second set of mounting holes on the interface boards are in the four corners of the pcb and provide clearance for 4-40 machine screws. the third set of mounting holes provides a pattern that matches the adisusbz evaluation system, using m2 0.4mm 4 mm machine screws. these boards are made of is410 material and are 0.063 inches thick. j1 is a 16-pin connector, in a dual row, 2 mm geometry, which enables simple connection to a 1 mm ribbon cable system. for example, use molex p/n 87568-1663 for the mating connector and 3m p/n 3625/16 for the ribbon cable. the leds (d1 and d2) are not populated, but the pads are available to install to provide a visual representation of the dio1 and dio2 signals. the pads accommodate chicago miniature lighting part no. cmd28-21vrc/tr8/t1, which works well when r1 and r2 are approximately 400 (0603 pad sizes). mating connector the mating connector for the adis16210, j2, is avx p/n 04-6288-015-000-846. figure 25 provides a close-up view of this connector, which clamps down on the flex to press its metal pads onto the metal pads inside of the mating connector. 09593-024 adis16210a1 package pin out figure 23. electrical schematic 09593-025 40.6mm 37.4mm 2.9mm figure 24. pcb assembly view and dimensions 09593-200 mating connector slider slide r locking direction adis16210 flex cable figure 25. mating connector detail
adis16210 rev. a | page 18 of 20 outline dimensions 0 4-27-2011-a 15.20 15.00 sq 14.80 24.20 24.00 23.80 20.20 20.00 19.80 top view bottom view 20.00 bsc 3.75 (4 plcs) r 2.65 (4 plcs) 2.65 (4 plcs) 3.50 (4 plcs) detail a front view 15.20 15.00 14.80 8.20 8.00 7.80 ? 1.65 hole and slot size for 1.5 mm pin r 0.83 (centers of 2 r 0.83 circles separated by 0.89) 0.50 nom pitch 3.50 nom 0.254 nom detail a figure 26. 15-lead module with connector interface (ml-15-1) dimensions shown in millimeters ordering guide model 1 temperature range package description package option adis16210cmlz ?40c to +125c 15-lead module with connector interface ml-15-1 adis16210/pcbz evaluation board 1 z = rohs compliant part.
adis16210 rev. a | page 19 of 20 notes
adis16210 rev. a | page 20 of 20 notes ?2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d09593-0-6/11(a)

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